NVIDIA Groq 3 LPX deterministic execution cuts voltage droop and power use on Vera Rubin

NVIDIA introduced the Groq 3 LPX accelerator as part of the Vera Rubin platform, focusing on power efficiency for high-interactivity inference. The company says the deterministic execution model, which schedules compute and data movement down to the clock cycle across all 256 LPU chips, enables two power management techniques: Preemptive Power (PEP) and Clock Period Synthesis (CPS). These reduce voltage droop by over 60% and lower the voltage guardband, yielding a low-double-digit percentage power reduction for the same workload, according to NVIDIA's internal testing and estimates.

How deterministic execution enables power savings

Groq 3 LPX uses a compiler to create a schedule of exactly when each piece of data moves to which compute unit and when operations execute, down to the clock cycle. This schedule extends across all 256 LPU chips in a rack. The compiler can then predict the electrical current draw for each cycle, which is the basis for PEP and CPS.

PEP commands the power delivery network to change voltage before demand arrives, because the compiler knows which cycle current will spike. CPS lengthens or shortens individual clock cycles to shape how abruptly demand rises and falls, using the plesiosynchronous clock system that keeps chips synchronized. Together, these reduce the voltage guardband, the safety margin that must be continually supplied to chips but does not directly power the AI workload. Since power is proportional to the square of voltage, a smaller guardband leads to disproportionately larger power savings.

Why voltage droop matters for AI workloads

AI workloads involve matrix and vector multiplies that cause high transistor switching in a short period, increasing current demand on a nanosecond scale. Chips draw extra current from nearby decoupling capacitors, which discharge and cause voltage to drop. Voltage regulators cannot respond instantaneously due to inductance, so the voltage recovers only after the regulator catches up. These temporary drops, called voltage droops, can cause incorrect results if voltage falls below the chip's minimum (Vmin). To avoid this, chips operate with a voltage guardband, which is mostly excess power. The deterministic schedule allows the compiler to prepare for demand changes and shape the sharpest changes, reducing the guardband needed.

Performance per watt as the key metric

NVIDIA frames performance per watt as the ultimate measure of an AI platform's value, rather than raw throughput. The Vera Rubin NVL72 delivers strong performance per watt across workloads from large-batch throughput to high-interactivity small batches. At the factory level, NVIDIA DSX MaxLPS software shifts power between racks to recover stranded capacity, enabling up to 40% more GPUs and 35% higher token throughput within the same power envelope. Rack-level capacitors and Intelligent Power Smoothing absorb bursty power spikes, allowing planning around sustained demand instead of worst-case peaks. Pairing Groq 3 LPX with Vera Rubin NVL72 achieves up to 35x higher throughput per megawatt versus the previous-generation GB200 NVL72 for 2T+ parameter models at long context and high interactivity, according to NVIDIA.